PTM: technology mapper for pass-transistor logic

The pass-transistor mapper (PTM) is reported; this is a logic synthesis tool specifically designed for pass-transistor-based logic library that has only three basic cells. It exploits the close relationship between a binary decision diagram (BDD) representation of logic and the structure of pass-transistor logic cells to ensure efficient mapping. BDD-variable order is achieved a genetic through algorithm with dynamic parameters. Unlike a previous system for pass-transistor logic, PTM integrates both synthesis and logic optimisation in one step and can be used for large logic functions. Results from using PTM on a large set of benchmarks are analysed using the MCNC CMOS cell library and are found to be promising