• DocumentCode
    1503118
  • Title

    An Efficient Robust Algorithm for the Surface-Potential Calculation of Independent DG MOSFET

  • Author

    Jandhyala, Srivatsava ; Mahapatra, Santanu

  • Author_Institution
    Nano Scale Device Res. Lab., Indian Inst. of Sci., Bangalore, India
  • Volume
    58
  • Issue
    6
  • fYear
    2011
  • fDate
    6/1/2011 12:00:00 AM
  • Firstpage
    1663
  • Lastpage
    1671
  • Abstract
    Although the recently proposed single-implicit-equation-based input voltage equations (IVEs) for the independent double-gate (IDG) MOSFET promise faster computation time than the earlier proposed coupled-equations-based IVEs, it is not clear how those equations could be solved inside a circuit simulator as the conventional Newton-Raphson (NR)-based root finding method will not always converge due to the presence of discontinuity at the G-zero point (GZP) and nonremovable singularities in the trigonometric IVE. In this paper, we propose a unique algorithm to solve those IVEs, which combines the Ridders algorithm with the NR-based technique in order to provide assured convergence for any bias conditions. Studying the IDG MOSFET operation carefully, we apply an optimized initial guess to the NR component and a minimized solution space to the Ridders component in order to achieve rapid convergence, which is very important for circuit simulation. To reduce the computation budget further, we propose a new closed-form solution of the IVEs in the near vicinity of the GZP. The proposed algorithm is tested with different device parameters in the extended range of bias conditions and successfully implemented in a commercial circuit simulator through its Verilog-A interface.
  • Keywords
    MOSFET; Newton-Raphson method; circuit simulation; G-zero point; IDG MOSFET; Newton-Raphson-based root finding method; Ridders algorithm; circuit simulation; circuit simulator; coupled-equations-based IVEs; efficient robust algorithm; independent DG MOSFET; independent double-gate MOSFET; nonremovable singularities; single-implicit-equation-based input voltage equations; surface-potential calculation; trigonometric IVE; Convergence; Electric potential; Equations; Logic gates; MOSFET circuits; Mathematical model; Upper bound; Circuit simulation; compact modeling; double-gate MOSFET; input voltage equations (IVEs);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2131654
  • Filename
    5755190