Three level NPC inverter DC capacitor sizing for a synchronous reluctance machine drive

This paper introduces the use of machine saliency as one of the parameters for the sizing of a three level inverter dc-link capacitor. A new nearest three vector (NTV) balancing algorithm is also introduced for the dc-link capacitors. A comparison between a two and three level inverter was conducted whereby the inverter input dc current for the two level inverter registered higher ripples than that of a three level inverter. This promises longer lifespan of the battery on a three level inverter driven SynRM. The SynRM also registered lower d-axis current ripple with a three level inverter which promises lower core losses in the machine. The benefits are even more significant at higher switching frequencies.