A capacitor-less gate drive circuit using two parasitic capacitors suitable for non-insulating-gate GaN FETs

New semiconductor devices such as Silicon Carbide (SiC) and Gallium Nitride (GaN) are very attractive for improving converter efficiency and power density in power electronics. Especially, GaN FETs are promising devices for the high speed switching and good cost performance due to being able to use silicon wafer, so that we focus on GaN FETs. There are two types of GaN FETs, and one, non-isolated GaN FETs, has a diode structure on the gate-to-source, and another, isolated GAN FETs, doesn´t have this feature. Non-isolated GaN FETs show better performance than isolated GaN FETs in terms of withstand voltage, allowable current, and other parameters. However, simple gate circuits used for MOS FET cannot be applied. Hence, many gate drive circuits for non-isolated GaN FETs are proposed. In this paper, we proposed a novel gate drive circuit for a non-isolated GaN FET, which uses two parasitic capacitors of the switches in the gate drive circuit. The experiment for the proposed gate drive circuit is executed with a simple test circuit. Furthermore, drive loss is analyzed and compared with a previous proposed gate drive circuits. Furthermore, we develop the theoretical equations for the gate drive loss and verify them experimentally. The drive and reverse conduction losses of the proposed capacitor-less gate drive circuit are compared with dividing capacitor gate drive circuit and previous capacitor-less gate drive circuits.