An improved Montgomery´s algorithm for high-speed RSA public-key cryptosystem

Author

Su, Chih-Yuang ; Hwang, Shih-Arn ; Chen, Po-Song ; Wu, Cheng-Wen

Author_Institution

Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan

Volume

7

Issue

2

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

280

Lastpage

284

Abstract

We revise Montgomery´s algorithm such that modular multiplication can be executed two times faster. Each iteration in our algorithm requires only one addition, while that in Montgomery´s requires two additions. We then propose a cellular array to implement modular exponentiation for the Rivest-Shamir-Adleman cryptosystem. It has approximately 2n cells, where n is the word length. The cell contains one full-adder and some controlling logic. The time to calculate a modular exponentiation is about 2n/sup 2/ clock cycles. The proposed architecture has a data rate of 100 kb/s for 512-b words and a 100 MHz clock.

Keywords

VLSI; algorithm theory; cellular arrays; digital arithmetic; digital signal processing chips; high-speed integrated circuits; multiplying circuits; public key cryptography; 100 MHz; 100 kbit/s; Montgomery algorithm improvement; RSA public-key cryptosystem; Rivest-Shamir-Adleman cryptosystem; cellular array; full-adder; high-speed cryptosystem; modular exponentiation; modular multiplication; Arithmetic; Clocks; Councils; Data security; Digital signatures; Logic; Public key; Public key cryptography; Transmitters; Very large scale integration;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/92.766756

Filename

766756