DocumentCode
1512473
Title
Performance Improvement of a Virtual-Ground Nonvolatile Charge-Trap Storage nor-Type Memory Cell With Optimized Junction Dosage for 45-nm Generation Node
Author
Ou, T.F. ; Tzeng, W.C. ; Tsai, C.H. ; Lee, G.D. ; Ku, S.H. ; Liu, C.H. ; Liu, K.W. ; Zous, N.K. ; Huang, S.W. ; Chen, M.S. ; Lu, W.P. ; Chen, K.C. ; Lu, Chih-Yuan
Author_Institution
Macronix Int. Co., Hsinchu, Taiwan
Volume
32
Issue
6
fYear
2011
fDate
6/1/2011 12:00:00 AM
Firstpage
734
Lastpage
736
Abstract
A variety of cell performances, such as program speed, second-bit effect, program disturbance along the channel direction (X-disturbance), and random telegraph noise (RTN), are investigated extensively under different junction dosages in a virtual-ground charge-trap nor array of 45-nm technology. Junction profiles and the location of programmed charges are compared by means of a gate-induced drain leakage scheme. Experiments reveal that the source/drain dosage beneath gate edges affects the program speed, injected charge distribution, X-disturbance induced by secondary impact ionization, and RTN performance.
Keywords
NOR circuits; random-access storage; RTN performance; X-disturbance; channel direction; gate-induced drain leakage scheme; generation node; injected charge distribution; junction dosage; junction profiles; program disturbance; program speed; random telegraph noise; second-bit effect; secondary impact ionization; size 45 nm; source-drain dosage; virtual-ground nonvolatile charge-trap storage NOR-type memory cell; Arrays; Channel hot electron injection; Current measurement; Flash memory; Junctions; Logic gates; Noise; Junction dosage; X-disturbance; program speed; random telegraph noise (RTN); second-bit effect (2nd bit effect); secondary impact ionization;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2011.2134064
Filename
5765422
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