• DocumentCode
    1513429
  • Title

    Systematic design of original and modified Mastrovito multipliers for general irreducible polynomials

  • Author

    Zhang, Tong ; Parhi, Keshab K.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
  • Volume
    50
  • Issue
    7
  • fYear
    2001
  • fDate
    7/1/2001 12:00:00 AM
  • Firstpage
    734
  • Lastpage
    749
  • Abstract
    This paper considers the design of bit-parallel dedicated finite field multipliers using standard basis. An explicit algorithm is proposed for efficient construction of Mastrovito product matrix, based on which we present a systematic design of Mastrovito multiplier applicable to GF(2m) generated by an arbitrary irreducible polynomial. This design effectively exploits the spatial correlation of elements in Mastrovito product matrix to reduce the complexity. Using a similar methodology, we propose a systematic design of modified Mastrovito multiplier, which is suitable for GF(2m) generated by high-Hamming weight irreducible polynomials. For both original and modified Mastrovito multipliers, the developed multiplier architectures are highly modular, which is desirable for VLSI hardware implementation. Applying the proposed algorithm and design approach, we study the Mastrovito multipliers for several special irreducible polynomials, such as trinomial and equally-spaced-polynomial, and the obtained complexity results match the best known results. Moreover, we have discovered several new special irreducible polynomials which also lead to low-complexity Mastrovito multipliers
  • Keywords
    Galois fields; Toeplitz matrices; computational complexity; digital arithmetic; multiplying circuits; polynomials; Hamming weight irreducible polynomials; Mastrovito product matrix; VLSI hardware implementation; arbitrary irreducible polynomial; bit-parallel dedicated finite field multipliers; complexity results; explicit algorithm; general irreducible polynomials; low-complexity Mastrovito multipliers; modified Mastrovito multipliers; spatial correlation; standard basis; systematic design; Algorithm design and analysis; Arithmetic; Cryptography; Design optimization; Electrostatic precipitators; Galois fields; Hardware; Polynomials; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.936239
  • Filename
    936239