• DocumentCode
    1513876
  • Title

    Synchronous approach to the functional equivalence of embedded system implementations

  • Author

    Hsieh, Harry ; Balarin, Felice ; Lavagno, Luciano ; Sangiovanni-Vincentelli, Alberto

  • Author_Institution
    Mainline Syst. Lab., Hewlett-Packard Co., Cupertino, CA, USA
  • Volume
    20
  • Issue
    8
  • fYear
    2001
  • fDate
    8/1/2001 12:00:00 AM
  • Firstpage
    1016
  • Lastpage
    1033
  • Abstract
    Design space exploration is the process of analyzing several functionally equivalent alternatives to determine the most suitable one. A fundamental question is whether an implementation is consistent with the high-level specification or whether two implementations are “equivalent.” The synchronous assumption has made it possible to develop efficient procedures for establishing functional equivalence between different implementations in the domains of synchronous circuits and synchronous reactive systems. We extend this notion to embedded systems that do not satisfy the synchronous assumption inside their boundaries but only at the interface with the environment. Leveraging this property, we define synchronous equivalence for embedded systems that strongly resembles the concept of functional equivalence for sequential circuits. We develop efficient synchronous equivalence analysis algorithms for embedded system designs. The efficiency comes from analyzing the behavior statically on abstract representations, at a cost that some of the negative results may be false, i.e. the analysis is conservative. We develop primitives for making the representation more/less abstract, trading off complexity of the algorithms with the conservativeness of the results. We apply our analysis algorithms to an ATM switch and demonstrate that synchronous equivalence opens design exploration avenues uncharted before
  • Keywords
    asynchronous transfer mode; embedded systems; high level synthesis; logic design; sequential circuits; ATM switch; embedded system design; high-level synthesis; sequential circuit; synchronous equivalence algorithm; synchronous reactive system; Algorithm design and analysis; Asynchronous transfer mode; Costs; Design methodology; Embedded system; Laboratories; Sequential circuits; Space exploration; Switches; Timing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.936382
  • Filename
    936382