• DocumentCode
    1514176
  • Title

    Improvement of threshold voltage deviation in damascene metal gate transistors

  • Author

    Yagishita, Atsushi ; Saito, Tomohiro ; Nakajima, Kazuaki ; Inumiya, Seiji ; Matsuo, Kouji ; Shibata, Takeshi ; Tsunashima, Yoshitaka ; Suguro, Kyoichi ; Arikado, Tsunetoshi

  • Author_Institution
    Process & Manuf. Eng. Center, Toshiba Corp., Yokohama, Japan
  • Volume
    48
  • Issue
    8
  • fYear
    2001
  • fDate
    8/1/2001 12:00:00 AM
  • Firstpage
    1604
  • Lastpage
    1611
  • Abstract
    The metal gate work function deviation (crystal orientation deviation) was found to cause the threshold voltage deviation (ΔV th) in the damascene metal gate transistors. When the TiN work function (crystal orientation) is controlled by using the inorganic CVD technique, ΔVth of the surface channel damascene metal gate (Al/TiN or W/TiN) transistors was drastically improved and found to be smaller than that for the conventional polysilicon gate transistors. The reason for the further reduction of the threshold voltage deviation (ΔVth) in the damascene metal gate transistors is considered to be that the thermal-damages and plasma-damages on gate and gate oxide are minimized in the damascene gate process. High performance sub-100 nm metal oxide semiconductor field effect transistors (MOSFETs) with work-function-controlled CVD-TiN metal-gate and Ta2O5 gate insulator are demonstrated in order to confirm the compatibility with high-k gate dielectrics and the technical advantages of the inorganic CVD-TiN
  • Keywords
    MOSFET; chemical vapour deposition; crystal orientation; dielectric thin films; work function; Al-TiN-Ta2O5; W-TiN-Ta2O5; compatibility; crystal orientation deviation; damascene metal gate transistors; gate oxide; high-k gate dielectrics; inorganic CVD technique; metal oxide semiconductor field effect transistors; plasma-damages; thermal-damages; threshold voltage deviation; work function deviation; Chemical processes; Dielectrics; Electrodes; FETs; MOSFETs; Metal-insulator structures; Plasma immersion ion implantation; Plasma temperature; Threshold voltage; Tin;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.936569
  • Filename
    936569