• DocumentCode
    1515994
  • Title

    Modeling differential via holes

  • Author

    Laermans, Eric ; De Geest, Jan ; De Zutter, Daniël ; Olyslager, Frank ; Sercu, Stefaan ; Morlion, Danny

  • Author_Institution
    Dept. of Inf. Technol., Ghent Univ., Belgium
  • Volume
    24
  • Issue
    3
  • fYear
    2001
  • fDate
    8/1/2001 12:00:00 AM
  • Firstpage
    357
  • Lastpage
    363
  • Abstract
    In this paper, we present a method to characterize differential via holes in printed circuit boards in a both fast and accurate way. The via hole is modeled as a cascade of capacitances and inductances. We use FASTCAP to compute the values of the capacitances, and a closed form formula to obtain the inductance values. The numerical predictions are compared with experimental data
  • Keywords
    capacitance; circuit layout CAD; circuit simulation; inductance; printed circuit layout; FASTCAP; capacitances; closed form formula; differential via holes; inductances; numerical predictions; printed circuit boards; Capacitance; Connectors; Frequency; Inductance; Integrated circuit interconnections; Interference; Printed circuits; Reflection; Signal analysis; Signal design;
  • fLanguage
    English
  • Journal_Title
    Advanced Packaging, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3323
  • Type

    jour

  • DOI
    10.1109/6040.938303
  • Filename
    938303