Ultralow-Power TFT With Gate Oxide Fabricated by Nitric Acid Oxidation Method

Author

Matsumoto, Taketoshi ; Kubota, Yasushi ; Yamada, Mikihiro ; Tsuji, Hiroshi ; Shimatani, Takafumi ; Hirayama, Yasuhiro ; Terakawa, Sumio ; Imai, Shigeki ; Kobayashi, Hikaru

Author_Institution

Liquid Crystal Display Group, Japan Sci. & Technol. Agency, Taki, Japan

Volume

31

Issue

8

fYear

2010

Firstpage

821

Lastpage

823

Abstract

We have fabricated a thin-film transistor (TFT) in which a gate oxide layer possesses a stack structure with an ultrathin interfacial SiO₂ layer formed by the nitric acid oxidation of silicon (NAOS) method at room temperature and a 40 nm CVD SiO₂ layer. The drain current-voltage characteristics show that TFT with NAOS interfacial layer can be operated at 3 V (the conventional operation voltage is 12-15 V), indicating that a vast decrease in TFT power consumption is possible. The threshold voltage becomes less than 1 V, and the short-channel effect can be avoided.

Keywords

CVD coatings; low-power electronics; oxidation; semiconductor device manufacture; silicon compounds; thin film transistors; CVD layer; NAOS method; SiO₂; drain current-voltage characteristics; gate oxide layer possesses; nitric acid oxidation of silicon method; power consumption; ultralow power TFT fabrication; ultrathin interfacial layer; Dielectric films; leakage currents; oxidation; thin-film transistor (TFT);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2010.2050856

Filename

5491087