A 118.4 GB/s Multi-Casting Network-on-Chip With Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition

Author

Kim, Joo-Young ; Park, Junyoung ; Lee, Seungjin ; Kim, Minsu ; Oh, Jinwook ; Yoo, Hoi-Jun

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea

Volume

45

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

1399

Lastpage

1409

Abstract

A 118.4 GB/s multi-casting network-on-chip (MC-NoC) is proposed as communication platform for a real-time object recognition processor. For application-specific NoC design, target traffic patterns are elaborately analyzed. Through topology exploration, we derive a hierarchical star and ring (HS-R) combined architecture for low latency and inter-processor communication. Multi-casting protocol and router are developed to accelerate one-to-many (1-to-N) data transactions. With these two main features, the proposed MC-NoC reduces data transaction time and energy consumption for the target object recognition traffic by 20% and 23%, respectively. The 350 k MC-NoC fabricated in a 0.13 CMOS process consumes 48 mW at 400 MHz, 1.2 V.

Keywords

data communication; multicast protocols; network-on-chip; object recognition; routing protocols; telecommunication traffic; CMOS process; MC-NoC; NoC design; data transaction; energy consumption; hierarchical star-ring combined topology; interprocessor communication; multicasting network-on-chip; multicasting protocol; real-time object recognition; real-time object recognition processor; topology exploration; Acceleration; CMOS process; Delay; Energy consumption; Network topology; Network-on-a-chip; Object recognition; Pattern analysis; Protocols; Telecommunication traffic; Hierarchical star-ring combined topology; multi-casting; network-on-chip; object recognition;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2010.2048085

Filename

5492313