• DocumentCode
    1525900
  • Title

    P-Channel Nonvolatile Flash Memory With a Dopant-Segregated Schottky-Barrier Source/Drain

  • Author

    Choi, Sung-Jin ; Han, Jin-Woo ; Moon, Dong-Il ; Kim, Sungho ; Jang, Moongyu ; Choi, Yang-Kyu

  • Author_Institution
    Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon, South Korea
  • Volume
    57
  • Issue
    8
  • fYear
    2010
  • Firstpage
    1737
  • Lastpage
    1742
  • Abstract
    A p-channel dopant-segregated-Schottky-barrier (DSSB) device based on a SOI FinFET structure is proposed for silicon-oxide-nitride-oxide-silicon type Flash memory, providing the feasibility of bit-by-bit operation through the aid of a symmetric program/erase operation. This concept is based on utilizing injected holes due to enhanced Fowler-Nordheim tunneling probability triggered by the sharpened energy band bending at the DSSB source/drain junctions as a programming method and the tunneled electrons from a silicon channel as an erasing method. As a result, a threshold voltage window of nearly 4 V and good data retention are achieved within a P/E time of 3.2 μs.
  • Keywords
    MOSFET; Schottky diodes; flash memories; random-access storage; silicon-on-insulator; tunnelling; DSSB device; DSSB source/drain junctions; Fowler-Nordheim tunneling probability; P-Channel Nonvolatile Flash Memory; P/E time; SOI FinFET structure; bit-by-bit operation; data retention; dopant-segregated Schottky-barrier device; energy band bending; erasing method; programming method; silicon channel; silicon-oxide-nitride-oxide-silicon type flash memory; symmetric erase operation; symmetric program operation; threshold voltage window; time 3.2 mus; tunneled electrons; voltage 4 V; Decision support systems; Electrons; FinFETs; Flash memory; Moon; Nonvolatile memory; Research and development; SONOS devices; Threshold voltage; Tunneling; nand flash; $V_{T}$ control; Bit-by-bit; FinFET; NiSi; Schottky-barrier; Schottky-barrier MOSFET; dopant-segregation (DS); flash memory; multilevel cell (MLC); nickel; nickel silicidation; nonvolatile memory; p-channel; silicon-oxide-nitride-oxide-silicon (SONOS);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2010.2051331
  • Filename
    5497127