Estimation of ground bounce effects on CMOS circuits

Author

Kabbani, Adnan ; Al-Khalili, Asim J.

Author_Institution

Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada

Volume

22

Issue

2

fYear

1999

fDate

6/1/1999 12:00:00 AM

Firstpage

316

Lastpage

325

Abstract

Ground bounce estimation is important to determine the impact of simultaneous switching of input/output (I/O) drivers and clock drivers on the performance of application-specific integrated circuits (ASIC´s). In this paper, we develop models to estimate the peak and damped resonance noise of the ground and power bounce. These models are developed for both long and short channel devices. Comparison with H-simulation program with integrated circuit emphasis (HSPICE) simulation indicates a good match. These models are simple and suitable for hand calculation

Keywords

CMOS integrated circuits; SPICE; application specific integrated circuits; driver circuits; integrated circuit modelling; integrated circuit noise; CMOS circuit; HSPICE simulation; application specific integrated circuit; clock driver; damped resonance noise; ground bounce; input/output driver; long channel device; model; peak noise; power bounce; short channel device; simultaneous switching noise; Application specific integrated circuits; CMOS technology; Circuit noise; Clocks; Driver circuits; Inductance; Integrated circuit noise; Packaging; Power supplies; Semiconductor device modeling;

fLanguage

English

Journal_Title

Components and Packaging Technologies, IEEE Transactions on

Publisher

ieee

ISSN

1521-3331

Type

jour

DOI

10.1109/6144.774752

Filename

774752