DocumentCode
1528538
Title
An All-Digital Large-
Audio Frequency Synthesizer for HDMI Applications
Author
Chung, Ching-Che ; Sheng, Duo ; Chang, Chia-Lin ; Ho, Wei-Da ; Lin, Yang-Di ; Lu, Fang-Nien
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
Volume
59
Issue
7
fYear
2012
fDate
7/1/2012 12:00:00 AM
Firstpage
424
Lastpage
428
Abstract
In this brief, a novel all-digital and large-frequency-multiplication-ratio audio frequency synthesizer for high-definition multimedia interface applications is presented. The proposed large- N frequency synthesizer is designed in an all-digital manner to reduce circuit complexity and design efforts in advanced CMOS process technology, as compared with prior studies. The proposed frequency synthesizer does not require an extra high-frequency reference clock source but employs a single locking loop to reduce lock-in time and enhance loop stability. Based on the proposed frequency search algorithm and the high-resolution digitally controlled oscillator, the frequency synthesizer cannot only provide a large frequency multiplication ratio, but it also achieves low-jitter performance. Measurement results show that the frequency multiplication ratio has a range of 4096 to 25 088 and that the power consumption of the proposed frequency synthesizer can be improved to 591 μW (at 24.576 MHz) with a peak-to-peak jitter of 1.23%. In addition, the proposed frequency synthesizer can be implemented with standard cells, making it easily portable to different processes and very suitable for system-on-a-chip applications.
Keywords
CMOS integrated circuits; frequency synthesizers; high definition video; oscillators; system-on-chip; HDMI; advanced CMOS process technology; all-digital large-N audio frequency synthesizer; circuit complexity; frequency 24.576 MHz; frequency search algorithm; high definition multimedia interface; high frequency reference clock source; high resolution digitally controlled oscillator; large frequency multiplication ratio audio frequency synthesizer; lock in time; loop stability; low jitter performance; power 591 muW; single locking loop; system-on-a-chip; Clocks; Frequency control; Frequency conversion; Frequency synthesizers; Jitter; Phase locked loops; Power demand; Frequency multiplication; high-definition multimedia interface (HDMI); jitter; phase-locked loops (PLLs);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2012.2198980
Filename
6209399
Link To Document