A vortex transitional memory cell for 1-Mbit/cm/sup 2/ density Josephson RAMs

Author

Numata, H. ; Nagasawa, S. ; Tahara, S.

Author_Institution

Fundamental Res. Labs., NEC Corp., Ibaraki, Japan

Volume

7

Issue

2

fYear

1997

fDate

6/1/1997 12:00:00 AM

Firstpage

2282

Lastpage

2287

Abstract

We developed an 8.5 /spl mu/m/spl times/11.5 /spl mu/m vortex transitional (VT) memory cell. The memory cell is the smallest Josephson memory cell ever reported. The cell was fabricated by electron cyclotron resonance plasma etching and bias-sputtering planarization. This is also the first Josephson circuit fabricated with sub-micron minimum feature size. Proper nondestructive read-out operation was verified even after half-selected conditions. An operating margin of /spl plusmn/14% was obtained for control currents I/sub X/ and I/sub Y/. These results are promising for developing a 1-Mbit/cm/sup 2/ density Josephson RAM.

Keywords

nondestructive readout; random-access storage; sputter etching; sputtering; superconducting memory circuits; Josephson RAM; bias-sputtering planarization; electron cyclotron resonance plasma etching; fabrication; nondestructive read-out; vortex transitional memory cell; Insulation; Niobium; Plasma sources; Random access memory; Read-write memory; Sputter etching; Sputtering; Sulfur hexafluoride; Superconducting integrated circuits; Wiring;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.621694

Filename

621694