• DocumentCode
    154172
  • Title

    Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects

  • Author

    Iraei, Rouhollah M. ; Bonhomme, Patrice ; Kani, Nickvash ; Manipatruni, Sasikanth ; Nikonov, Dmitri E. ; Young, Ian A. ; Naeemi, Azad

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2014
  • fDate
    20-23 May 2014
  • Firstpage
    353
  • Lastpage
    356
  • Abstract
    The energy-per-bit and delay of All-Spin Logic (ASL) interconnects have been modeled. Both Al and Cu interconnect channels have been considered and the impact of size effects and dimensional scaling on their potential performance has been quantified. It is predicted that size effects will affect ASL interconnects more severely than electrical interconnects.
  • Keywords
    CMOS logic circuits; aluminium; copper; integrated circuit interconnections; Al; CMOS; Cu; all-spin logic interconnects; dimensional scaling; electrical interconnects; size effects; CMOS integrated circuits; Delays; Frequency modulation; Grain boundaries; Integrated circuit interconnections; Magnetic circuits; Metals;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC), 2014 IEEE International
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4799-5016-4
  • Type

    conf

  • DOI
    10.1109/IITC.2014.6831833
  • Filename
    6831833
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=154172