CMOS compatible fabrication methods for submicron Josephson junction qubits

Author

Potts, A. ; Parker, G.J. ; Baumberg, J.J. ; De Groot, F. A J

Author_Institution

Dept. of Electron. & Comput. Sci., Southampton Univ., UK

Volume

148

Issue

5

fYear

2001

fDate

9/1/2001 12:00:00 AM

Firstpage

225

Lastpage

228

Abstract

The authors have developed two distinct processes for the fabrication of mesoscopic Josephson junction qubits that are compatible with conventional CMOS processing. These devices, based on superconducting Al/Al₂O₃/Al tunnel junctions, are fabricated by electron beam lithography using single-layer and multilayer resists. The new single-layer resist process is found to have significant advantages over conventional fabrication methods using suspended tri-layer shadow masks. It is simpler and more accurate to implement, and avoids the significant areas of redundant metallisation that are an unavoidable by-product of the tri-layer shadow mask method

Keywords

SQUIDs; electron beam lithography; quantum gates; single electron transistors; superconducting logic circuits; superconducting transistors; Al-Al₂O₃-Al; CMOS compatible fabrication methods; SET; SQUID; electron beam lithography; mesoscopic Josephson junction; multilayer resists; quantum box; quantum computing; redundant metallisation; single-layer resist; submicron Josephson junction qubits; superconducting tunnel junctions;

fLanguage

English

Journal_Title

Science, Measurement and Technology, IEE Proceedings -

Publisher

iet

ISSN

1350-2344

Type

jour

DOI

10.1049/ip-smt:20010395

Filename

959656