Improvement of P-channel SOI LDMOS transistor by adapting a new tapered oxide technique

Author

Kim, Jongdae ; Kim, Sang-Gi ; Song, Q. Sang ; Lee, Sang Yong ; Koo, Jin-Gun ; Ma, Dong Sung

Author_Institution

Micro-Electron. Technol. Lab., Electron. & Telecommun. Res. Inst., Taejon, South Korea

Volume

46

Issue

9

fYear

1999

fDate

9/1/1999 12:00:00 AM

Firstpage

1890

Lastpage

1894

Abstract

On-resistance of P-channel REduced SURface Field (RESURF) lateral double-diffused MOS (LDMOS) transistors has been improved by using a new tapered TEOS field oxide on the drift region of the devices. The new tapered oxidation technique provides better uniformity, less than 3%, and reproducibility. With the similar breakdown voltage (V_B), at V_gs=-5.0 V, the specific on-resistance (R_sp) of the LDMOS with the tapered field oxide is about 31.5 mΩ·cm ², while that of the LDMOS with the conventional field oxide is about R_sp=57 mΩ·cm². The uniformities of R_sp and V_B are less than 5 and 3%, respectively

Keywords

insulating thin films; oxidation; power MOSFET; semiconductor device breakdown; semiconductor device reliability; silicon-on-insulator; P-channel SOI LDMOS transistor; TEOS field oxide; breakdown voltage; drift region; lateral double-diffused MOS; reduced surface field; reproducibility; specific on-resistance; tapered oxidation technique; tapered oxide technique; CMOS process; Impurities; Intelligent structures; Laboratories; MOSFET circuits; Oxidation; Power MOSFET; Reproducibility of results; Silicon on insulator technology; Temperature;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.784190

Filename

784190