DocumentCode
1546522
Title
A 3.4 W Digital-In Class-D Audio Amplifier in 0.14 
m CMOS
Author
Dooper, Lûtsen ; Berkhout, Marco
Author_Institution
NXP Semicond., Nijmegen, Netherlands
Volume
47
Issue
7
fYear
2012
fDate
7/1/2012 12:00:00 AM
Firstpage
1524
Lastpage
1534
Abstract
In this paper a class-D audio amplifier for mobile applications is presented realized in a 0.14 μm CMOS technology tailored for mobile applications. The amplifier has a simple PDM-based digital interface for audio and control that requires only two pins and enables assembly in 9-bump WL-CSP. The complete audio path is discussed that consists of a Parser, Digital PWM controller, 1-bit DA-converters, analog feedback loop and the Class-D power stage. A reconfigurable gate driver is used that reduces quiescent current consumption and radiated emission.
Keywords
CMOS analogue integrated circuits; audio-frequency amplifiers; driver circuits; mobile radio; 9-bump WL-CSP; CMOS technology; DA-converter; PDM-based digital interface; Parser; analog feedback loop; class-D power stage; current consumption; digital PWM controller; digital-in class-D audio amplifier; emission radiation; mobile application; pin; power 3.4 W; pulse density modulation; reconfigurable gate driver; size 0.14 mum; Feedback loop; Frequency modulation; Logic gates; Noise; Pulse width modulation; Sigma delta modulation; Digital-analog conversion; power amplifier; pulse width modulation; sigma delta modulation;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2012.2191683
Filename
6222362
Link To Document