• DocumentCode
    1549422
  • Title

    Non-recursive decimation filters with arbitrary integer decimation factors

  • Author

    Mondal, Kamanashish ; Mitra, Subhasish

  • Author_Institution
    Gildart Haase Sch. of Comput. Sci. & Eng., Fairleigh Dickinson Univ., Teaneck, NJ, USA
  • Volume
    6
  • Issue
    3
  • fYear
    2012
  • fDate
    5/1/2012 12:00:00 AM
  • Firstpage
    141
  • Lastpage
    151
  • Abstract
    Cascaded integrator comb (CIC) filters are in wide use in oversampled analog-to-digital converters. In this study, the authors advances three new cascaded decimator structures with integer coefficients designed using a polynomial factorisation approach. Each one of the designed decimators shows better stopband attenuation for a given order and decimation factor than the CIC or recently proposed generalised comb filter (GCF) and may not require any prefilter for performance enhancement. A fourth new decimator structure is a hybrid between the CIC and GCF with coefficients approximated by integers. Decimator power dissipation analysis and optimisation have previously been done either by counting the number of additions per sample rate or by focusing on register clock distribution. The authors propose a new metric for estimating the power dissipation of a filter structure from its architecture accounting for dissipation both in the adder cells and the flip-flops. The authors show frequency domain characteristics and compare power dissipations of all the new structures using a representative example.
  • Keywords
    adders; analogue-digital conversion; cascade networks; clock distribution networks; comb filters; flip-flops; frequency-domain analysis; optimisation; polynomials; CIC filters; adder cells; arbitrary integer decimation factors; cascaded decimator structures; cascaded integrator comb filters; decimation factor; decimator power dissipation analysis; filter structure; flip-flops; fourth new decimator structure; frequency domain characteristics; generalised comb filter; integer coefficients; nonrecursive decimation filters; oversampled analog-to-digital converters; polynomial factorisation approach; register clock distribution; stop band attenuation;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices & Systems, IET
  • Publisher
    iet
  • ISSN
    1751-858X
  • Type

    jour

  • DOI
    10.1049/iet-cds.2011.0240
  • Filename
    6226929