DocumentCode
1558177
Title
Effect of Cu stud microstructure and electroplating process on intermetallic compounds growth and reliability of flip-chip solder bump
Author
Xiao, Guo-Wei ; Chan, Philip C.H. ; Teng, Annette ; Cai, Jian ; Yuen, Matthew M F
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
Volume
24
Issue
4
fYear
2001
fDate
12/1/2001 12:00:00 AM
Firstpage
682
Lastpage
690
Abstract
In electroplating-based flip-chip technology, the Cu stud and solder deposition processes are two of the most important factors affecting the reliability of solder joints. The growth of Cu-Sn intermetallic compounds (IMC) also plays a critical role. In this paper, the effect of Cu stud surface roughness and microstructures on the reliability of solder joint was studied. The surface roughness of the Cu stud was increased as the Cu electroplating current density increased. The microstructural morphology of the Cu-Sn IMC layer was affected by Cu stud surface structure. We found the growth rate of IMC layer increased with the increasing of Cu stud grain size and surface roughness during aging test. The growth kinetics of Cu-Sn intermetallic compound formation for 63Sn/37Pb solder followed the Arrhenius equation with activation energy varied from 0.78 eV to 1.14 eV. The ratios of Cu3 Sn layer thickness to the total Cu-Sn IMC layer thickness was in the range of 0.5 to 0.15 for various Cu microstructures at 150°C during thermal aging test. The shear strength of solder bump was measured after thermal aging and temperature/humidity tests. The relationship between electroplating process and reliability of solder joints was established. The failure mode of solder joints was also analyzed
Keywords
chemical interdiffusion; copper; electroplating; flip-chip devices; grain size; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; reflow soldering; scanning electron microscopy; shear strength; surface topography; 150 C; Arrhenius equation; Cu; Cu stud microstructures; Cu-SnPb; SEM micrographs; activation energy; electroplating current density; electroplating-based flip-chip technology; failure mode; flip-chip solder bump reliability; interdiffusion constant; intermetallic compounds growth; reflow process; shear strength; stud grain size; stud surface roughness; thermal aging; under bump metal deposition; Aging; Current density; Intermetallic; Microstructure; Rough surfaces; Soldering; Surface morphology; Surface roughness; Surface structures; Testing;
fLanguage
English
Journal_Title
Components and Packaging Technologies, IEEE Transactions on
Publisher
ieee
ISSN
1521-3331
Type
jour
DOI
10.1109/6144.974961
Filename
974961
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