Modeling of single-event effects in circuit-hardened high-speed SiGe HBT logic

Author

Niu, Guofu ; Krithivasan, Ramkumar ; Cressler, John D. ; Marshall, Paul ; Marshall, Cheryl ; Reed, Robert ; Harame, David L.

Author_Institution

Dept. of Electr. & Comput. Eng., Auburn Univ., AL, USA

Volume

48

Issue

6

fYear

2001

fDate

12/1/2001 12:00:00 AM

Firstpage

1849

Lastpage

1854

Abstract

This paper presents single-event effect (SEE) modeling results of circuit-hardened SiGe heterojunction bipolar transistor logic circuits. A simple equivalent circuit is proposed to model the ion-induced currents at all of the terminals, including the p-type substrate. The SEE sensitivity of a D-flip-flop was simulated using the proposed equivalent circuit. The simulation results are qualitatively consistent with earlier SEE testing results. The circuit upset is shown to be independent of the number of active paths. Considerable charge collection occurs through the reverse-biased n-collector/p-substrate junction, regardless of the status of the emitter steering current, resulting in circuit upset through the commonly connected load resistor. A heavily doped substrate is shown to be beneficial for SEE

Keywords

Ge-Si alloys; bipolar logic circuits; current-mode logic; equivalent circuits; flip-flops; heavily doped semiconductors; heterojunction bipolar transistors; integrated circuit modelling; radiation hardening (electronics); CML; D-flip-flop; SEE modeling; SEE sensitivity; SiGe; charge collection; circuit upset; circuit-hardened SiGe logic circuits; commonly connected load resistor; current-mode logic; equivalent circuit; heavily doped substrate; heterojunction bipolar transistor logic circuits; high-speed SiGe HBT logic; ion-induced currents; p-type substrate; reverse-biased n-collector/p-substrate junction; simulation; single-event effect modeling; Circuit simulation; Circuit testing; Electric variables; Equivalent circuits; Germanium silicon alloys; Heterojunction bipolar transistors; Logic circuits; Microwave technology; Semiconductor process modeling; Silicon germanium;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.983141

Filename

983141