• DocumentCode
    1560884
  • Title

    1/f gate tunneling current noise model of ultrathin oxide MOSFETs

  • Author

    Martinez, F. ; Soliveres, S. ; Leyris, C. ; Valenza, M.

  • Author_Institution
    CEM2, Univ. Montpellier II, France
  • fYear
    2006
  • Firstpage
    193
  • Lastpage
    198
  • Abstract
    An analytical model for 1/f gate noise is developed and applied to the simulation of ultra-thin MOSFETs. The proposed model is based on oxide trapping mechanisms and uses surface potential modelling including quantum mechanical and gate polydepletion effects. The developed model reproduces experimental behaviors. Moreover, we have performed 1/f gate current noise for various drain voltage, and we show that there is no impact of the drain current noise on the gate current noise. Finally, we propose a compact model formulation for conventional circuit simulators.
  • Keywords
    1/f noise; MOSFET; semiconductor device models; semiconductor device noise; 1/f gate tunneling current noise model; drain current noise; drain voltage; gate current noise; gate polydepletion effects; oxide trapping mechanisms; quantum mechanical effects; surface potential modelling; ultrathin oxide MOSFET; Circuit noise; Frequency; Low-frequency noise; MOSFETs; Noise measurement; Quantum computing; Quantum mechanics; Semiconductor device noise; Tunneling; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 2006. ICMTS 2006. IEEE International Conference on
  • Print_ISBN
    1-4244-0167-4
  • Type

    conf

  • DOI
    10.1109/ICMTS.2006.1614302
  • Filename
    1614302