Monitoring BIST by covers

Author

Gössel, M. ; Jürgensen, H.

Author_Institution

Fault-Tolerant Comput. Group, Potsdam Univ., Germany

fYear

1993

Firstpage

208

Lastpage

213

Abstract

The authors show how to combine a conventional built-in self-test method with a simple method for online error detection for combinational circuits. The output sequence of one or more components of the signature analyzer is monitored, in test mode, by an error detection circuit consisting of a one-cover and a zero-cover. The cover circuits need to detect only such faults that are masked by the signature analyzer. Because of a large number of don´t-care conditions for the cover circuits the hardware overhead is very low. All faults in the fault model under consideration are detected either by the cover circuits or, due to an erroneous signature, by the signature analyzer

Keywords

automatic testing; built-in self test; combinational circuits; design for testability; fault diagnosis; logic design; logic testing; BIST; built-in self-test; combinational circuits; cover circuits; error detection circuit; hardware overhead; one-cover; online error detection; signature analyzer; zero-cover; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Costs; Electrical fault detection; Fault detection; Hardware; Monitoring;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93., European

Conference_Location

Hamburg

Print_ISBN

0-8186-4350-1

Type

conf

DOI

10.1109/EURDAC.1993.410639

Filename

410639