• DocumentCode
    1564111
  • Title

    Optimizing the memory bandwidth with loop morphing

  • Author

    Gomez, J.I. ; Marchal, P. ; Verdoorlaege, S. ; Pinuel, L. ; Catthoor, F.

  • Author_Institution
    DACYA UCM, Madrid, Spain
  • fYear
    2004
  • Firstpage
    213
  • Lastpage
    223
  • Abstract
    The memory bandwidth largely determines the performance of embedded systems. However, very often compilers ignore the actual behavior of the memory architecture, causing large performance loss. To better utilize the memory bandwidth, several researchers have introduced instruction scheduling/data assignment techniques. Because they only optimize the bandwidth inside each basic block, they often fail to use all available bandwidth. Loop fusion is an interesting alternative to more globally optimize the memory access schedule. By fusing loops we increase the number of independent memory operations inside each basic block. The compiler can then better exploit the available bandwidth and increase the system´s performance. However, existing fusion techniques can only combine loops with a conformable header. To overcome this limitation we present loop morphing; we combine fusion with strip mining and loop splitting. We also introduce a technique to steer loop morphing such that we find a compact memory access schedule. Experimental results show that with our approach we can decrease the execution time up to 88%.
  • Keywords
    bandwidth allocation; embedded systems; memory architecture; optimisation; program compilers; program control structures; scheduling; data assignment; embedded systems; instruction scheduling; loop fusion; loop morphing; loop splitting; memory access scheduling; memory architecture; memory bandwidth optimization; strip mining; Bandwidth; Costs; Delay; Embedded system; Memory architecture; Optimizing compilers; Performance loss; Processor scheduling; Runtime; Strips;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application-Specific Systems, Architectures and Processors, 2004. Proceedings. 15th IEEE International Conference on
  • ISSN
    2160-0511
  • Print_ISBN
    0-7695-2226-2
  • Type

    conf

  • DOI
    10.1109/ASAP.2004.1342472
  • Filename
    1342472