DocumentCode
1564690
Title
A compiler framework for recovery code generation in general speculative optimizations
Author
Lin, Jin ; Hsu, Wei-Chung ; Yew, Pen-Chung ; Ju, Roy Dz-ching ; Ngai, Tin-Fook
Author_Institution
Dept. of Comput. Sci., Minnesota Univ., MN, USA
fYear
2004
Firstpage
17
Lastpage
28
Abstract
A general framework that integrates both control and data speculation using alias profiling and/or compiler heuristic rules has shown to improve SPEC2000 performance on Itanium systems. However, speculative optimizations require check instructions and recovery code to ensure correct execution when speculation fails at runtime. How to generate check instructions and their associated recovery code efficiently and effectively is an issue yet to be well studied. Also, it is very important that the recovery code generated in the earlier phases integrate gracefully in the later optimization phases. At the very least, it should not hinder later optimizations, thus, ensuring overall performance improvement. This paper proposes a framework that uses an if-block structure to facilitate check instructions and recovery code generation for general speculative optimizations. It allows speculative instructions and their recovery code generated in the early compiler optimization phases to be integrated effectively with the subsequent optimization phases. It also allows multilevel speculation for multilevel pointers and multilevel expression trees to be handled with no additional complexity. The proposed recovery code generation framework has been implemented in the open research compiler (ORC).
Keywords
instruction sets; optimising compilers; parallel programming; performance evaluation; program control structures; system recovery; Itanium systems; check instructions; compiler framework; compiler heuristic rules; compiler optimization phase; if-block structure; multilevel expression trees; multilevel pointers; multilevel speculative optimization; recovery code generation; Computer science; Control systems; Data engineering; Delay; Microprocessors; Optimizing compilers; Performance analysis; Registers; Runtime; Scheduling algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architecture and Compilation Techniques, 2004. PACT 2004. Proceedings. 13th International Conference on
ISSN
1089-795X
Print_ISBN
0-7695-2229-7
Type
conf
DOI
10.1109/PACT.2004.1342538
Filename
1342538
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