T1/E1/J1 receiver in CMOS

Behavioural model, simulation and testing results of a mixed-signal short/long haul receiver suitable for the high speed T1/E1/J1 applications in CMOS are presented. The measured results demonstrate successful recovery of distorted incoming signals attenuated from 0-44 dB(max). The mixed-signal part of the receiver chip occupies area of 1.2 mm by 1.8 mm in CMOS 0.35 mum process and requires typically 120 mW of power at 3.3 V power supply. The operation of the receiver is supported by digital framer and local RAM is used for storing the unshielded twisted pair (UTP) cable models which can be easily reprogrammed.