Joint variable partitioning and bank selection instruction optimization on embedded systems with multiple memory banks

Multiple memory banks with bank switching is a technique to increase memory size without extending address buses. A special instruction, Bank Selection Instruction (BSL) is inserted into the original programs to modify the bank register to point to the right bank, which increases both the code size and runtime overhead. In this paper, we carefully partition variables into different banks and insert BSLs at different positions so that the overheads can be minimized. Minimizing code size and minimizing runtime overhead are two objectives investigated in this paper. Experiments show that the algorithms proposed can reduce the overhead caused by BSLs efficiently.