DocumentCode
1572087
Title
Saturating counters: application and design alternatives
Author
Koren, Israel ; Koren, Yaron ; Oomman, Bejoy G.
Author_Institution
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear
2003
Firstpage
228
Lastpage
235
Abstract
We define a new class of parallel counters, saturating counters, which provide the exact count of the inputs that are 1 only if this count is below a given threshold. Such counters are useful in, for example, a self-test and repair unit for embedded memories in a system-on-a-chip. We describe this application and present several alternatives for the design of the saturating counter. We then compare the delay and area of the proposed design alternatives.
Keywords
built-in self test; counting circuits; digital arithmetic; embedded systems; parallel processing; system-on-chip; embedded memory self-test; multiplier units; parallel counter; saturating counter; system-on-a-chip; Application software; Built-in self-test; Computed tomography; Counting circuits; Delay; Fault diagnosis; Image processing; Manufacturing; System-on-a-chip; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 2003. Proceedings. 16th IEEE Symposium on
ISSN
1063-6889
Print_ISBN
0-7695-1894-X
Type
conf
DOI
10.1109/ARITH.2003.1207683
Filename
1207683
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