DocumentCode
1572280
Title
Exceeding the dataflow limit via value prediction
Author
Lipasti, Mikko H. ; Shen, John Paul
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
1996
Firstpage
226
Lastpage
237
Abstract
For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit-the dataflow limit-on the parallel execution of serial programs. This paper proposes a new technique-value prediction-for exceeding that limit that allows data dependent instructions to issue and execute in parallel without violating program semantics. This technique is built on the concept of value locality which describes the likelihood of the recurrence of a previously-seen value within a storage location inside a computer system. Value prediction consists of predicting entire 32- and 64-bit register values based on previously-seen values. We find that such register values being written by machine instructions are frequently predictable. Furthermore, we show that simple microarchitectural enhancements to a modern microprocessor implementation based on the PowerPC 620 that enable value prediction can effectively exploit value locality to collapse true dependences, reduce average result latency and provide performance gains of 4.5%-23% (depending on machine model) by exceeding the dataflow limit
Keywords
instruction sets; parallel architectures; parallel programming; dataflow limit; machine instructions; microarchitectural enhancements; program semantics; serialization constraints; storage location; value locality; value prediction; Arithmetic; Computer aided instruction; Delay; Microarchitecture; Microprocessors; Modems; Parallel processing; Pipelines; Registers; Strain control;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 1996. MICRO-29.Proceedings of the 29th Annual IEEE/ACM International Symposium on
Conference_Location
Paris
Print_ISBN
0-8186-7641-8
Type
conf
DOI
10.1109/MICRO.1996.566464
Filename
566464
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