Image sensor readout circuitry supporting the analog computation of large vertical surrounds

A logarithmic CMOS image sensor is proposed with a readout circuit that allows the direct calculation of a weighted average of pixels in a column. The kernel weights are controlled through bias voltages in a set of variable-gain current mirrors. A detailed description of the circuit topology and design is given. The circuitry was simulated using 1.2°m CMOS technology. The simulation shows that inaccuracies in the effective kernel weights due to changes in loading as the photodiode currents for individual pixels vary result in errors of no more than 0.88% in the computed vertical averages for an example 33-pixel Gaussian kernel. The analog computation of the vertical averages eliminates the need for the buffer memory that is ordinarily required when implementing two-dimensional image filters entirely in digital hardware.