Motorola MC68040 high-speed design using altera EPM5000 erasable programmable logic devices

Many designs use EPLDs (Erasable Programmable Logic Devices) to implement control logic and state machines. If the design is slow, timing through the EPLD is not crucial so designers often treat the device as a black box. In high speed designs, timing through the EPLD is critical. In these cases a thorough understanding of the device architecture is necessary. Lessons learned in the implementation of a high-speed design using the Altera EPM5130 are discussed