• DocumentCode
    1575311
  • Title

    Atomistic simulation on gate-recessed InAs/GaSb TFETs and performance benchmark

  • Author

    Zhengping Jiang ; Yu He ; Guangle Zhou ; Kubis, Tillmann ; Xing, Huili Grace ; Klimeck, Gerhard

  • Author_Institution
    Network for Comput. Nanotechnol., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2013
  • Firstpage
    145
  • Lastpage
    146
  • Abstract
    Fully atomistic simulations for realistically extended complex devices show the best performing SSmin. The L-shaped TFETs show best performance; however, their scaling is limited by the undercut. The ON currents in UTB TFETs are limited by source-gate coupling, which can be improved by including a doping layer. NW TFETs suffer from strong confinement effects, which reduce the ON current densities significantly. Wire diameters of more than 10 nm are required to get the broken-gap band alignment.
  • Keywords
    III-V semiconductors; field effect transistors; gallium compounds; indium compounds; semiconductor device testing; InAs-GaSb; TFET; UTB; atomistic simulation; broken-gap band alignment; doping layer; source-gate coupling; Benchmark testing; Doping; Educational institutions; Electrostatics; Logic gates; Performance evaluation; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2013 71st Annual
  • Conference_Location
    Notre Dame, IN
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-4799-0811-0
  • Type

    conf

  • DOI
    10.1109/DRC.2013.6633835
  • Filename
    6633835
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1575311