Code Compilation for an Explicitly Parallel Register-Sharing Architecture

Code generation for a multithreaded register sharing architecture is inherently complex and involves some issues absent in conventional code compilation. To approach the problem, we define a consistency contract between the program and the hardware and require the compiler to preserve the contract during code transformations. To apply the contract to compiler implementation, we develop a correctness framework that ensures preservation of the contract and use it to adjust the code optimizations for correctness under parallel code. One area that is naturally affected by register sharing is register allocation. We discuss adaptation of existing coloring-based algorithms for shared code and show how they benefit from the consistency contract. Another benefit affects the general compiler optimizations. We show that these optimizations need very little restrictions in order to be correct for parallel code, allowing the compiler to realize its potential to a high degree.