A design of fast searcher for CDMA WLL system

Author

Cho, Yongkwon ; Lee, Seongjoo ; Kim, Jaeseok

Author_Institution

Dept. of Electron. & Comput. Eng., Yonsei Univ., Seoul, South Korea

fYear

1999

fDate

6/21/1905 12:00:00 AM

Firstpage

582

Lastpage

585

Abstract

We present a high-speed power-efficient fast searcher module for an initial code acquisition in CDMA wireless local loop (WLL) system. We introduce a double-dwell serial search algorithm with 16 parallel active correlators to meet mean code acquisition time required in WLL system. We pipeline parallel active correlators and make use of a common energy processing element and a microcontroller I/F block. As a result, hardware complexity is reduced to only 1/4 of a conventional searcher consisting of 16 correlators

Keywords

code division multiple access; correlators; radio access networks; CDMA WLL system; I/F block; common energy processing element; double-dwell serial search algorithm; hardware complexity; high-speed power-efficient fast searcher module; initial code acquisition; mean code acquisition time; microcontroller; parallel active correlators; wireless local loop; Application specific integrated circuits; Correlators; Delay; Design engineering; Hardware; Matched filters; Multiaccess communication; Pipelines; Power engineering computing; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI and CAD, 1999. ICVC '99. 6th International Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-5727-2

Type

conf

DOI

10.1109/ICVC.1999.821006

Filename

821006