New Error Sensitivity Model for the Analog Hardware Implementation of Inner Products

Author

Gomes, Jose Gabriel R. C. ; de Mello, M.J.C. ; Haas, H.L. ; Petraglia, A.

Author_Institution

Dept. of Electr. Eng., Fed. Univ. of Rio de Janeiro, Brazil

fYear

2006

Firstpage

3333

Lastpage

3336

Abstract

We propose a new model for the analysis of the sensitivity of inner products to analog hardware implementation. This model is based on spice simulations of the circuits to be implemented, and is useful for the design of image compression systems for CMOS imaging sensors. By means of numerical simulations, the new model is compared with a previous simplified model, and shown to be equivalent to this previous model for 4-bit precision. For 6-bit precision, the results differ from the theoretical predictions made by the previous model. Image compression results are presented.

Keywords

CMOS image sensors; SPICE; data compression; image coding; CMOS imaging sensor; analog hardware implementation; error sensitivity model; image compression system; inner products; spice simulation; CMOS image sensors; Circuit simulation; Hardware; Image coding; Image converters; Multilayer perceptrons; Optical imaging; Pixel; Semiconductor device modeling; Vector quantization; CMOS analog integrated circuits; Image coding; Multilayer perceptrons; Vector quantization;

fLanguage

English

Publisher

ieee

Conference_Titel

Image Processing, 2006 IEEE International Conference on

Conference_Location

Atlanta, GA

ISSN

1522-4880

Print_ISBN

1-4244-0480-0

Type

conf

DOI

10.1109/ICIP.2006.313138

Filename

4107284