• DocumentCode
    1579910
  • Title

    A Novel Architecture of Implementing Error Detecting AES Using PRNS

  • Author

    Chu, Junfeng ; Benaissa, Mohammed

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Univ. of Sheffield, Sheffield, UK
  • fYear
    2011
  • Firstpage
    667
  • Lastpage
    673
  • Abstract
    A new method using polynomial residue number systems (PRNS) is introduced in this paper to protect the Advanced Encryption Standard (AES) against faults attacks. By using PRNS, the byte based AES operations over GF(28) are decomposed into several parallel operations that use its residues over smaller fields. In this implementation, three GF(24) irreducible polynomials are selected as the moduli set for the chosen PRNS, including a redundant modulus to achieve error detection. Three GF(24) AES cores are constructed individually according to the chosen moduli. This PRNS architecture brings several advanced features to AES design from the scope of anti-side-channel analysis. Firstly, for each 8-bit GF(28) element, this implementation is capable of detecting up to 4 bit errors that occur in a single GF(24) AES core. Secondly, thanks to the data independency between PRNS operations, the distributed PRNS AES cores have an intrinsic resistance against probing attacks. In addition, due to the introduction of redundant information and the residue representation replacing the original representation, more confusion is added to the system, which may also enhance the design´s security. To the authors´ knowledge, this is the world´s first PRNS AES implementation. Hardware implementation results are also given in this paper.
  • Keywords
    computational complexity; cryptography; residue number systems; antiside-channel analysis; byte based AES operations; design security; error detecting advanced encryption standard; faults attacks; intrinsic resistance; parallel operations; polynomial residue number systems; probing attacks; redundant modulus; residue representation; Encryption; Hardware; Polynomials; Random access memory; Table lookup; AES; Polynomial Residue Number; error detecting;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design (DSD), 2011 14th Euromicro Conference on
  • Conference_Location
    Oulu
  • Print_ISBN
    978-1-4577-1048-3
  • Type

    conf

  • DOI
    10.1109/DSD.2011.90
  • Filename
    6037474