Modeling arsenic activation and diffusion during furnace and rapid thermal annealing

Author

Vandenbossche, Eric ; Jaouen, Hervé ; Baccus, Bruno

Author_Institution

SGS-Thomson Microelectron., Crolles, France

fYear

1995

Firstpage

81

Lastpage

84

Abstract

A model has been developed for arsenic diffusion after ion implantation and validated for a very wide range of annealing conditions including furnace and rapid thermal annealing (RTA). Transient-enhanced diffusion (TED) and activation are modeled by taking into account the ion implantation damage and clustering kinetics for arsenic. It is shown that for advanced CMOS and BiCMOS technologies the activation of impurities is governed by the rapid annealing steps through the release of charged arsenic defect pairs

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; annealing; arsenic; diffusion; doping profiles; elemental semiconductors; ion implantation; rapid thermal annealing; semiconductor process modelling; silicon; As diffusion; BiCMOS technologies; CMOS technologies; Si:As; annealing conditions; charged As defect pairs; clustering kinetics; furnace annealing; impurity activation; impurity diffusion; ion implantation damage; process modeling; rapid thermal annealing; source/drain doping profiles; transient-enhanced diffusion; BiCMOS integrated circuits; CMOS technology; Calibration; Charge carrier processes; Furnaces; Ion implantation; Kinetic theory; Rapid thermal annealing; Semiconductor device modeling; Semiconductor process modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.497187

Filename

497187