A design exploration environment

Author

Wilberg, J. ; Kuth, A. ; Vierhaus, H.T. ; Camposano, R. ; Rosenstiel, W.

Author_Institution

GMD-SET, Saint Augustin, Germany

fYear

1996

Firstpage

77

Lastpage

80

Abstract

The paper describes the design exploration environment of the CASTLE system. The environment allows the exploration of hardware and software for complex processor designs. The exploration is subdivided into the measurement phase and the analysis phase. The measurement phase uses a retargetable compiler to determine the performance for a large number of different processors and different programs. These fine-grained data form the input of the analysis phase. It transforms the data into abstract representations that are visualized for the designer. The results are integrated into an HTML-based framework

Keywords

VLSI; hardware description languages; hypermedia; integrated circuit design; CASTLE system; HTML-based framework; abstract representations; analysis phase; complex processor designs; design exploration environment; fine-grained data; measurement phase; retargetable compiler; Data mining; Environmental management; File systems; Frequency; Information analysis; Information filters; Processor scheduling; Program processors; Rendering (computer graphics); Space exploration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 1996. Proceedings., Sixth Great Lakes Symposium on

Conference_Location

Ames, IA

ISSN

1066-1395

Print_ISBN

0-8186-7502-0

Type

conf

DOI

10.1109/GLSV.1996.497597

Filename

497597