The effectiveness of brute force attacks on RC4

The security of encryption algorithms depends heavily on the computational infeasibility of exhaustive key-space searches. We use the RC4 cipher, utilized primarily in the area of data communications, as a test case for determining the effectiveness of exhaustive key-searches implemented on FPGAs using a network on chip (NoC) design architecture. Preliminary results show that a network of key-checker units implemented on a Xilinx XC2V1000 FPGA using Celoxica DK2 design tools can exploit the speed and parallelism of hardware such that the entire key-space of a 40-bit RC4 encryption can be searched in minutes. Furthermore, it has been found that the clock rate of the circuit diminishes as the number of key-checker units increases. Future work is proposed to find a method for predicting an optimal balance between the size of the network (number of key-checker units) and the clock rate in order to maximize performance.