DocumentCode
1593534
Title
The Role of Shallow Trench Isolation on Channel Width Noise Scaling for Narrow Width CMOS and Flash Cells
Author
Lu, Yin-Lung Ryan ; Liao, Yu-Ching ; McMahon, William ; Lee, Yung-Huei ; Kung, Helen ; Fastow, Richard ; Ma, Sean
Author_Institution
Intel Corp., Santa Clara, CA
fYear
2008
Firstpage
85
Lastpage
86
Abstract
RTS noise is a growing issue in flash memory as the cell size scales down. By investigating NMOS and Ring devices, it is shown that noise induced by the STI edge dominates cell RTS/noise with scaling or after cycling. Device 1/f characterization highlights the drain STI edge as a critical area for RTS improvement in flash.
Keywords
CMOS integrated circuits; flash memories; isolation technology; 1/f characterization; NMOS; Ring devices; channel width noise scaling; drain STI edge; flash cells; flash memory; narrow width CMOS; shallow trench isolation; CMOS technology; Control systems; Degradation; Educational institutions; Flash memory; MOS devices; Noise measurement; Signal analysis; Telegraphy; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
978-1-4244-1614-1
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2008.4530810
Filename
4530810
Link To Document