Efficient implementation of DVR´s control

This paper reports the detailed implementation of a three-phase dynamic voltage restorer (DVR). Such devices have gained popularity among the PWM-based compensation series devices. Two cases are studied: balanced and unbalanced voltage sags, which are the most frequent disturbances. For the latter case, a modified delta rule is used to transform the three-phase voltage into positive, negative, and zero sequences. The model of the LC filter is explained and a Software Phase Locked Loop (SPLL) based on Trans-vector-type is developed. DVR´s simulations are provided. Hardware implementation employs a fixed point Digital Signal Processor and power electronics devices, as well as an SPLL. Experimental results on voltage sags have been dealt with to corroborate the adequate DVR performance.