An asymptotically optimal algorithm for gate array placement

A novel technique, the neighbor state transition (NST) method, is introduced for solving a class of optimization problems often found in VLSI designs. The NST method utilizes the powerful means developed for the optimization in continuous space to solve the optimization problems confined to discrete points. For a well known NP-hard problem, gate array placement, the method produces an asymptotically global optimum solution in polynomial time. The numerical experiment has been carried out to compare the NST method with the existing well known algorithms, such as simulated annealing, force-relaxation, and Min-cut. The experiment result demonstrates the effectiveness of the NST algorithm and further confirms the authors theoretic claim