A hardware-in-loop FACTS control system design for real-time power system simulation

This paper presents the development of a FACTS interaction laboratory (FIL) to interface a real-time power system simulator with multiple FACTS/UPFC devices via hardware-in-loop (HIL) to study their dynamic responses and test control approaches. The HIL line includes a synchronous machine, a UPFC device and a load device to simulate the dynamics of the UPFC sub-network. The practical feasibility of the proposed HIL scheme has been demonstrated by implementation on a PC-DSP-based UPFC platform. A detailed design of the HIL distributed control system including synchronous machine, UPFC and load is presented.