DocumentCode
1599187
Title
Network processor design for optical burst switched networks
Author
Mehrotra, Pronita ; Baldine, Ilia ; Stevenson, Dan ; Franzon, Paul
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
296
Lastpage
300
Abstract
Scalable hardware, architectures are required for optical burst switched (OBS) networks where future fibers may be handling 4Tbps or more. Issues investigated include centralized vs. distributed architectures, sealing issues related to performance, and the hardware impact of just-in-time (JIT) vs. just-enough-time (JET) signaling
Keywords
optical fibre networks; telecommunication signalling; wavelength division multiplexing; 4 Tbit/s; centralized architectures; distributed architectures; just-enough-time signaling; just-in-time signaling; optical burst switched networks; optical fibers; scalable hardware architectures; sealing issues; Computer architecture; Delay; Engines; Hardware; Optical design; Optical fiber networks; Process design; Protocols; Switches; Wavelength division multiplexing;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6741-3
Type
conf
DOI
10.1109/ASIC.2001.954715
Filename
954715
Link To Document