DocumentCode
1601499
Title
A programmable cascadable single chip simultaneous maximum and minimum indicator
Author
Aisuwailem, A.M.
Author_Institution
Dept. of Electr. Eng., King Saud Univ., Riyadh
fYear
1995
Firstpage
562
Lastpage
566
Abstract
A simple design of a simultaneous maximum and minimum indicator is presented in this paper. This indicator can be cascaded to any number of stages in a decade manner, and it is also include a built in self test hardware. The function of the various design units simulation results and the hardware testing are also provided
Keywords
built-in self test; cascade networks; indicators; peak detectors; programmable logic devices; built in self test hardware; hardware testing; peak detection; programmable cascadable single chip simultaneous maximum/minimum indicator; Automatic testing; Circuit testing; Computer aided engineering; Counting circuits; Displays; Frequency measurement; Hardware; Power measurement; Pulse generation; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Automation and Control: Emerging Technologies, 1995., International IEEE/IAS Conference on
Conference_Location
Taipei
Print_ISBN
0-7803-2645-8
Type
conf
DOI
10.1109/IACET.1995.527620
Filename
527620
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