First run S-DMB MMIC low noise amplifier

Author

Jato, Yolanda ; Perez, C. ; Herrera, Alfredo ; Diego, L.

Author_Institution

Dept. of Commun. Eng., Univ. of Cantabria, Santander, Spain

fYear

2013

Firstpage

265

Lastpage

268

Abstract

This paper reports on the simulation steps needed to design a GaAs MMIC LNA for S-DMB on-board satellite applications in only one fabrication iteration, which achieves a noise figure <; 1.3 dB and gain> 28 dB for applications from 1.95 to 2.3 GHz. In addition, the amplifier obtains a high linearity with an OIP3 of 20.7 dBm and PldB of 6 dBm over a 1.95-2.3 GHz bandwidth. Availability of accurate library simulation models and the use of ADS co-simulation scheme permit us reducing design time and more importantly obtaining a first run working chip.

Keywords

MMIC amplifiers; digital multimedia broadcasting; iterative methods; low noise amplifiers; ADS co-simulation scheme; GaAs MMIC LNA; S-DMB MMIC low noise amplifier; S-DMB on-board satellite applications; accurate library simulation; fabrication iteration; first run working chip; frequency 1.95 GHz to 2.3 GHz; satellite digital multimedia broadcasting; Frequency measurement; Gain; Gain measurement; Loss measurement; Noise; Noise figure; Stability analysis; GaAs HEMT; Low Noise Amplifier (LNA);

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices (CDE), 2013 Spanish Conference on

Conference_Location

Valladolid

Print_ISBN

978-1-4673-4666-5

Electronic_ISBN

978-1-4673-4667-2

Type

conf

DOI

10.1109/CDE.2013.6481393

Filename

6481393