DocumentCode
1602629
Title
A single-multiplier quadratic interpolator for LNS arithmetic
Author
Arnold, Mark G. ; Winkel, Mark D.
Author_Institution
Univ. of Manchester Inst. of Sci. & Technol., UK
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
178
Lastpage
183
Abstract
Linear interpolation requires a single multiplication but is significantly less accurate than quadratic interpolation. The latter requires two multiplications. Two novel quadratic interpolation schemes are shown that approximate the functions required by the logarithmic number system (LNS) with more accuracy than linear interpolation using only a single multiplication. One method uses two ROMs to give the accuracy of quadratic interpolation, whilst the other uses one ROM to give four- to six-bits better accuracy than linear interpolation. These techniques save four- to eight-fold on memory compared to linear interpolation for the same accuracy. We illustrate the usefulness of these techniques for serial implementation with a clone of the ARMTM microprocessor (known as AWE) that we developed with LNS instructions. We also show a novel technique for decreasing the propagation delay in both linear and quadratic interpolation that stores the logarithm of the derivative of the function in a ROM, rather than the function itself
Keywords
fixed point arithmetic; interpolation; fixed-point logarithm; linear interpolation; logarithmic number system; multiplication; quadratic interpolation; Cloning; Floating-point arithmetic; Hardware; Interpolation; Microprocessors; Polynomials; Propagation delay; Read only memory; Roundoff errors; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-7695-1200-3
Type
conf
DOI
10.1109/ICCD.2001.955022
Filename
955022
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