DocumentCode
160546
Title
Power analysis of a FPGA implementation of SM4
Author
Shuang Qiu ; Guoqiang Bai
Author_Institution
Dept. of Microelectron. & Nanoelectron., Tsinghua Univ., Beijing, China
fYear
2014
fDate
11-13 July 2014
Firstpage
1
Lastpage
6
Abstract
SM4 (SMS4) algorithm is a block cipher used in the Chinese National Standard for WLAN WAPI. In this paper we investigate the vulnerability of SM4 FPGA (Field Programmable Array) implementation to differential power analysis (DPA). To tackle this issue, we review the theory behind the conventional DPA on DES and AES first. By comparing the differences in algorithm structure, we show that SM4 is more difficult to attack than DES and AES. Then, we concentrate on showing how “chosen-text DPA” can be applied to attack SM4 successfully while the conventional DPA is hardly effective. Experimental results against a FPGA implementation of SM4 demonstrate the inefficient of conventional DPA and the effectiveness of “chosen-text DPA”. In addition, proper countermeasures for SM4 are also discussed according to its DPA-related properties.
Keywords
cryptography; field programmable gate arrays; power aware computing; AES; DES; FPGA; SM4 algorithm; SMS4 algorithm; WLAN WAPI; block cipher; chosen-text DPA; differential power analysis; field programmable array; Algorithm design and analysis; Ciphers; Field programmable gate arrays; Hardware; Power demand; Registers; DES; FPGA; SM4; SMS4; differential power analysis(DPA);
fLanguage
English
Publisher
ieee
Conference_Titel
Computing, Communication and Networking Technologies (ICCCNT), 2014 International Conference on
Conference_Location
Hefei
Print_ISBN
978-1-4799-2695-4
Type
conf
DOI
10.1109/ICCCNT.2014.6963131
Filename
6963131
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